Research output per year
Research output per year
Personal profile
Education
2008 Ph.D., Seoul National University
2004 LLM, Columbia University
2003 MBA Sejong University
2000 M.L Seoul National University
1993 B.A., Seoul National University
2004 LLM, Columbia University
2003 MBA Sejong University
2000 M.L Seoul National University
1993 B.A., Seoul National University
Professional Experience
• (2000.01-2014.8) Lawyer at Kim&Chang, Microsoft etc
• (2009-2010, 2014-2015) Judicial Research officer at Korean Supreme Court
• (2008-2012.2) Professor of Law at Kyungbuk University Law School
• (2009-2010, 2014-2015) Judicial Research officer at Korean Supreme Court
• (2008-2012.2) Professor of Law at Kyungbuk University Law School
Research Interests
• Intellectual Property Law(Patent, Copyright etc)
• Antitrust Law
• Taxation and Finance
• Antitrust Law
• Taxation and Finance
Major Research Achievements
•Intellectual Property Law in Korea(coauthor)(2016)
• US Patent Law (2010)
• Financial Transaction and Law (2016)
• Regulation of Patent through Antitrust Law(2012)
• US Patent Law (2010)
• Financial Transaction and Law (2016)
• Regulation of Patent through Antitrust Law(2012)
Fingerprint
Dive into the research topics where Sung Jai Choi is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Precision-extension technique for accurate vectormatrix multiplication with CNT transistor crossbar array
Kim, S., Lee, Y., Kim, H.-D. & Choi, S.-J., 2019, In: Nanoscale.Research output: Contribution to journal › Article › peer-review
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Fin-width dependence of BJT-based 1 T-DRAM implemented on FinFET
Moon, D.-I., Choi, S.-J., Han, J.-W., Kim, S. & Choi, Y.-K., 2010, In: IEEE Electron Device Letters. 31, 9, p. 909-911 3 p.Research output: Contribution to journal › Article › peer-review
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A Novel Capacitorless DRAM Operated by Gate-Induced Drain-Leakage (GIDL) for Improved Sensing Window and Low Power Operation
Choi, S.-J., Ryu, S.-W., Han, J.-W., Kim, S. & Choi, Y.-K., 2009, The 16th Korean Conference on Semiconductors. p. 62-63 2 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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Energy-Band-Engineered Unified-RAM (URAM) Cell on Buried $$ hbox $$Si$$ $$1-y$$$ hbox $$C$$ $$y$$ $ Substrate for Multifunctioning Flash Memory and 1T-DRAM
Han, J.-W., Ryu, S.-W., Kim, C.-J., Choi, S.-J., Kim, S., Ahn, J.-H., Kim, D.-H., Choi, K. J., Cho, B. J. & Kim, J.-S., 2009, In: IEEE Transactions on Electron Devices. 56, 4, p. 641-647 7 p.Research output: Contribution to journal › Article › peer-review
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Current Flow Mechanism in Schottky-Barrier MOSFETs and Application to the 1T-DRAM
Choi, S.-J., Han, J.-W., Kim, S., Choi, C., Jang, M. & Choi, Y.-K., 2008, Solid State Devices and Materials. p. 226-227 2 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review